Solder Paste Scooping Detection by Multilevel Visual Inspection of Printed Circuit Boards
Benedek, Csaba and Krammer, O and Janóczki, M and Jakab, L (2013) Solder Paste Scooping Detection by Multilevel Visual Inspection of Printed Circuit Boards. IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 60 (6). pp. 2318-2331. ISSN 0278-0046 MTMT:1896926; doi:10.1109/TIE.2012.2193859
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Abstract
In this paper we introduce an automated Bayesian visual inspection framework for Printed Circuit Board (PCB) assemblies, which is able to simultaneously deal with various shaped Circuit Elements (CE) on multiple scales. We propose a novel Hierarchical Multi Marked Point Process (HMMPP) model for this purpose, and demonstrate its efficiency on the task of solder paste scooping detection and scoop area estimation, which are important factors regarding the strength of the joints. A global optimization process attempts to find the optimal configuration of circuit entities, considering the observed image data, prior knowledge, and interactions between the neighboring CEs. The computational requirements are kept tractable by a data driven stochastic entity generation scheme. The proposed method is evaluated on real PCB data sets containing 125 images with more than 10.000 splice entities.
Item Type: | ISI Article |
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Subjects: | Q Science > QA Mathematics and Computer Science > QA75 Electronic computers. Computer science / számítástechnika, számítógéptudomány |
Divisions: | Distributed Events Analysis Research Laboratory |
SWORD Depositor: | MTMT Injector |
Depositing User: | EPrints Admin |
Date Deposited: | 05 Feb 2014 12:31 |
Last Modified: | 11 Apr 2014 12:03 |
URI: | https://eprints.sztaki.hu/id/eprint/7504 |
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